Michael Hübner

Tom Kessler muss sich mit dem Trauma seiner Kindheit auseinandersetzen. Er wurde damals entführt und steht jetzt erneut unter Gefahr. Fesselnder Psychothriller!

Thriller

Stigma

Jürgen Becker

The purpose of this book is to evaluate strategies for future system design in multiprocessor system-on-chip (MPSoC) architectures. Both hardware design and integration of new development tools will be discussed. Novel trends in MPSoC design, combined with reconfigurable architectures are a main topic of concern. The main emphasis is on architectures, design-flow, tool-development, applications and system design.

Hardware Design and Tool Integration

Multiprocessor System-on-Chip

Was ist das Geheimnis menschlicher Kreativität? Und welch grausame Formen kann sie annehmen? Der Schriftsteller Mark Ritter erwacht eines Morgens mit blutverschmierter Kleidung im Kölner Rheinpark. Seine Erinnerung an die vorherige Nacht ist völlig ausgelöscht. Er weiß nur, dass er am Abend die Kunstausstellung seines besten Freundes besucht hat. Doch der ist seitdem spurlos verschwunden. Zu allem Überfluss wird ein bekannter Kunstkritiker ermordet aufgefunden, und alle Indizien deuten auf Mark als Täter. Um seine Unschuld zu beweisen, muss er herausfinden, was in dieser Nacht geschehen ist. Doch die Suche nach seiner Erinnerung wird zu einer albtraumhaften Odyssee, an deren Ende er auf einen Gegner trifft, der vor nichts zurückschreckt. Und um ihn zu bezwingen, muss Mark seine ganze Kreativität einsetzen.

Die Kunst zu morden

Joao Cardoso

As the complexity of modern embedded systems increases, it becomes less practical to design monolithic processing platforms. As a result, reconfigurable computing is being adopted widely for more flexible design. Reconfigurable Computers offer the spatial parallelism and fine-grained customizability of application-specific circuits with the postfabrication programmability of software. To make the most of this unique combination of performance and flexibility, designers need to be aware of both hardware and software issues. FPGA users must think not only about the gates needed to perform a computation but also about the software flow that supports the design process. The goal of this book is to help designers become comfortable with these issues, and thus be able to exploit the vast opportunities possible with reconfigurable logic.

From FPGAs to Hardware/Software Codesign

Reconfigurable Computing

Nikolaos Voros

Alberto Rosti

Dynamic System Reconfiguration in Heterogeneous Platforms defines the MORPHEUS platform that can join the performance density advantage of reconfigurable technologies and the easy control capabilities of general purpose processors. It consists of a System-on-Chip made of a scalable system infrastructure hosting heterogeneous reconfigurable accelerators, providing dynamic reconfiguration capabilities and data-stream management capabilities.

The MORPHEUS Approach

Dynamic System Reconfiguration in Heterogeneous Platforms

Kentaro Sano

Dimitrios Soudris

Pedro C. Diniz

This book constitutes the refereed proceedings of the 11th International Symposium on Applied Reconfigurable Computing, ARC 2015, held in Bochum, Germany, in April 2015. The 23 full papers and 20 short papers presented in this volume were carefully reviewed and selected from 85 submissions. They are organized in topical headings named: architecture and modeling; tools and compilers; systems and applications; network-on-a-chip; cryptography applications; extended abstracts of posters. In addition, the book contains invited papers on funded R&D - running and completed projects and Horizon 2020 funded projects.

11th International Symposium, ARC 2015, Bochum, Germany, April 13-17, 2015, Proceedings

Applied Reconfigurable Computing

Cristina Silvano

This book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips. · Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall; · Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point; · Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes.

Michael Hübner

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